;; circuit1.clp: Jess code to represent a logic circuit
;;
;; Note: this is demonstration code only;
;; IT DOESN'T WORK!


;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;;
;; Circuit structure
;;
;; Each circuit element has a name, connectivity
;; information, and a current value.

;; a NOT gate
(deftemplate not-gate "Logical not"
  (slot name)
  (slot input)
  (slot output)
  (slot value (default unknown)))

;; Input port: input to the circuit
(deftemplate input-port "Circuit input"
  (slot name)
  (slot output)
  (slot value (default unknown)))

;; Output port: output from a circuit
(deftemplate output-port "Circuit output"
  (slot name)
  (slot input)
  (slot value (default unknown)))

;; Connector
;; Note that this really is unnecessary; we could just connect each
;; element directly
(deftemplate connector "Connects one input to one or more outputs"
  (slot name)
  (slot input)
  (multislot output)
  (slot value (default unknown)))


;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;;
;; A simple circuit

(deffacts simple "A simple circuit"
  (input-port (name in1) (output conn1) (value TRUE))
  (connector (name conn1) (input in1) (output not1))
  (not-gate (name not1) (input conn1) (output conn2))
  (connector (name conn2) (input not1) (output out1))
  (output-port (name out1) (input conn2)))



;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;;
;; Gate rules

;; This propagates an input value from an input port to a
;; connector. IT DOESN'T WORK! Why? Well, it modifies a fact on its
;; RHS that is matched by a CE on its LHS. The modified fact is still
;; matched by that CE, and nothing else is done to prevent the other
;; CEs on the LHS from being matched, so we get the rule re-activated
;; and have an infinite loop

(defrule propagate-input "Copy value from input port to connector"
  (input-port (name ?n) (output ?c) (value ?v&~unknown))
  ?cf <- (connector (name ?c))
 =>
  (modify ?cf (value ?v)))