.. _VIC:

=============================
Vectored Interrupt Controller
=============================

Features of the VIC
-------------------
The VIC has the following features:

* compliance to the AMBA Specification (Rev 2.0) onwards for easy integration into SoC implementation
* support for 32 standard interrupts
* support for 16 vectored IRQ interrupts
* hardware interrupt priority
* IRQ and FIQ generation
* AHB mapped for faster interrupt response software interrupt generation
* test registers
* raw interrupt status
* interrupt request status
* interrupt masking
* privileged mode support
* vector interrupt controller daisy-chaining support.

:ref:`VIC_Channels`

VIC Interrupt Addresses
-----------------------
This is a list of the interrupts the different addresses are assigned to.

0. WDT_INT
#. SWI_INT
#. ARM_CORE0_INT
#. ARM_CORE1_INT
#. TIMER0_INT
#. TIMER1_INT
#. UART0_INT
#. UART1_INT
#. PWM0_1_INT
#. I2C0_INT
#. SPI0_INT
#. SSP0_INT
#. SSP1_INT
#. PLL_INT
#. RTC_INT
#. EINT0_INT
#. EINT1_INT
#. EINT2_INT
#. EINT3_INT
#. ADC0_INT
#. I2C1_INT
#. BOD_INT
#. EMAC_INT
#. USB_INT
#. CAN_INT
#. MCI_INT
#. GPDMA_INT
#. TIMER2_INT
#. TIMER3_INT
#. UART2_INT
#. UART3_INT
#. I2C2_INT
#. I2S_INT

Documents
---------

:download:`VIC Manual.pdf <VIC/VIC Manual.pdf>`