Vectored Interrupt Controller

Features of the VIC

The VIC has the following features:

  • compliance to the AMBA Specification (Rev 2.0) onwards for easy integration into SoC implementation
  • support for 32 standard interrupts
  • support for 16 vectored IRQ interrupts
  • hardware interrupt priority
  • IRQ and FIQ generation
  • AHB mapped for faster interrupt response software interrupt generation
  • test registers
  • raw interrupt status
  • interrupt request status
  • interrupt masking
  • privileged mode support
  • vector interrupt controller daisy-chaining support.

VIC Channels

VIC Interrupt Addresses

This is a list of the interrupts the different addresses are assigned to.

  1. WDT_INT
  2. SWI_INT
  3. ARM_CORE0_INT
  4. ARM_CORE1_INT
  5. TIMER0_INT
  6. TIMER1_INT
  7. UART0_INT
  8. UART1_INT
  9. PWM0_1_INT
  10. I2C0_INT
  11. SPI0_INT
  12. SSP0_INT
  13. SSP1_INT
  14. PLL_INT
  15. RTC_INT
  16. EINT0_INT
  17. EINT1_INT
  18. EINT2_INT
  19. EINT3_INT
  20. ADC0_INT
  21. I2C1_INT
  22. BOD_INT
  23. EMAC_INT
  24. USB_INT
  25. CAN_INT
  26. MCI_INT
  27. GPDMA_INT
  28. TIMER2_INT
  29. TIMER3_INT
  30. UART2_INT
  31. UART3_INT
  32. I2C2_INT
  33. I2S_INT

Documents

VIC Manual.pdf